Title
Optimization of Surface Orientation for High-Performance, Low-Power and Robust FinFET SRAM
Abstract
We analyze the impact of surface orientation on stability, performance and power of 6-T and 8-T FinFET SRAMs. We show that, in comparison to 32nm 6-T FinFET SRAM cell with devices of (110) orientation, multi-oriented devices with optimized orientation can improve the static noise margin (SNM) by 23-35% and access time (~22-33%), while consuming the same leakage power. For 8-T FinFET SRAM, multi-oriented devices can improve write stability substantially (~17%) with negligible area overhead
Year
DOI
Venue
2006
10.1109/CICC.2006.321009
San Jose, CA
Keywords
Field
DocType
MOSFET,SRAM chips,32 nm,FinFET SRAM cell,multioriented devices,static noise margin,surface orientation
Static noise margin,Access time,Computer science,Leakage power,Static random-access memory,Electronic engineering,Sram cell,MOSFET
Conference
ISBN
Citations 
PageRank 
1-4244-0076-7
4
1.34
References 
Authors
0
3
Name
Order
Citations
PageRank
Saakshi Gangwal141.34
Saibal Mukhopadhyay21288150.52
Kaushik Roy37093822.19