Title | ||
---|---|---|
A Parallel Progressive Refinement Image Rendering Algorithm on a Scalable Multithreaded VLSI Processor Array |
Abstract | ||
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In this paper we develop a multithreaded VLSI processor linear array architecture to render complex environments based on the radiosity approach. The processing elements are identical and multithreaded. They work in Single Program Multiple Data (SPMD) mode. A new algorithm to do the radiosity computations based on the progressive refinement approach[2] is proposed. Simulation results indicate that the architecture is latency tolerant and scalable. It is shown that a linear array of 128 uni-threaded processing elements sustains a throughput close to 0.4 million patches/sec. |
Year | DOI | Venue |
---|---|---|
1993 | 10.1109/ICPP.1993.30 | Parallel Processing, 1993. ICPP 1993. International Conference |
Keywords | Field | DocType |
latency tolerant,uni-threaded processing element,single program multiple data,complex environment,scalable multithreaded vlsi processor,progressive refinement approach,linear array,radiosity approach,multithreaded vlsi processor,parallel progressive refinement image,linear array architecture,processing element,gaussian processes,parallel processing,convergence,very large scale integration,computer architecture | SPMD,Processor array,Computer science,Parallel computing,Supercomputer Education Research Centre,Throughput,Radiosity (computer graphics),Very-large-scale integration,Progressive refinement,Distributed computing,Scalability | Conference |
Volume | ISSN | ISBN |
3 | 0190-3918 | 0-8493-8983-6 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nandy, S.K. | 1 | 43 | 7.29 |
Narayan, R. | 2 | 0 | 0.34 |
Visvanathan, V. | 3 | 10 | 3.55 |
P. Sadayappan | 4 | 4821 | 344.32 |