Name
Abstract | ||
|---|---|---|
Conventional voltage scaling systems require a delay margin to maintain a certain level of robustness across all possible device and wire process variations and temperature fluctuations. This margin is required to cover for a possible change in the critical path due to such variations. Moreover, a slower interconnect delay scaling with voltage compared to logic delay can cause the critical path to change from one operating voltage to another. With technology scaling, both process variation and interconnect delay are growing and demanding more margin to guarantee an error-free operation. Such margin is translated into a voltage overhead and a corresponding energy inefficiency. In this paper, a critical path emulator architecture is shown to track the changing critical path at different process splits by probing the actual transistor and wire conditions. Furthermore, voltage scaling characteristics of the actual critical path is closely tracked by programming logic and interconnect delay lines to achieve the same delay combination as the actual critical path. Compared to conventional open-loop and closed-loop systems, the proposed system is up to 39% and 24% more energy efficient, respectively. A 0.18-mum technology test chip is designed to verify the functionality of the proposed system showing critical path tracking of a 16times16 bit multiplier |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/TVLSI.2007.896909 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
CMOS digital integrated circuits,integrated circuit interconnections,integrated circuit modelling,0.18 micron,adaptive voltage scaling,circuit modeling,critical path tracking,deep submicrometer MOSFET,variation aware,Adaptive voltage scaling (AVS),circuit modeling,critical path tracking,deep submicrometer MOSFET | Computer science,Voltage,Electronic engineering,Robustness (computer science),Low voltage,Process variation,Critical path method,MOSFET,Scaling,Low-power electronics | Journal |
Volume | Issue | ISSN |
15 | 5 | 1063-8210 |
Citations | PageRank | References |
38 | 1.95 | 16 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohamed Elgebaly | 1 | 46 | 2.59 |
| Manoj Sachdev | 2 | 669 | 88.45 |