Abstract | ||
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A charge pump topology with enhanced driving capability for very low voltage applications is presented. The proposed scheme is able to operate with a supply voltage as low as 900 mV and ensures high voltage gain, high driving capability, and high power efficiency over the whole current range. A suitable boosting circuit allows adequately low on-resistance of transfer devices while still limiting the impact of parasitic capacitances. Simulation results show the effectiveness of the proposed approach. |
Year | DOI | Venue |
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2006 | 10.1109/ICECS.2006.379891 | ICECS |
Keywords | Field | DocType |
CMOS integrated circuits,low-power electronics,network topology,power convertors,voltage regulators,CMOS charge pump circuits,boosting circuit,parasitic capacitance,power efficiency,transfer devices,voltage 900 mV,voltage gain | Parasitic capacitance,Computer science,Voltage,CMOS,Electronic engineering,Control engineering,Low voltage,Charge pump,High voltage,Electrical engineering,Voltage regulator,Low-power electronics | Conference |
ISBN | Citations | PageRank |
1-4244-0395-2 | 0 | 0.34 |
References | Authors | |
2 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Laura Gobbi | 1 | 7 | 1.96 |
Alessandro Cabrini | 2 | 108 | 24.11 |
Guido Torelli | 3 | 240 | 64.39 |