Title
Applying Low Power Techniques in AES MixColumn/InvMixColumn Transformations
Abstract
In low power resources environments with increased security needs, like smart cards or RFIDs tags, power consumption plays a crucial role in system efficiency. Since AES algorithm is widely used in the above applications, power efficient design of this algorithm is essential. However few researchers have extensively studied this issue but rather focus on high throughput designs. In this paper the low power techniques of Resource Sharing and Power Management are applied in a 32-bit architecture for the MixColumn/InvMixColumn transformation of the Advanced Encryption Standard. The proposed architecture performs multiplication in GF(28) field of a byte Si,j . with specific constants, using a common data path. Low power consumption is also achieved by deactivating the unused parts of the data path when MixColumn Transformation is performed. The proposed architecture achieves low power consumption and low area resources compared to other designs.
Year
DOI
Venue
2006
10.1109/ICECS.2006.379628
ICECS
Keywords
Field
DocType
Galois fields,cryptography,logic design,low-power electronics,AES MixColumn/InvMixColumn transformations,AES algorithm,RFIDs tags,advanced encryption standard,data path,low power techniques,power consumption,power management,resource sharing,smart cards,word length 32 bit
Logic synthesis,Power management,Byte,Advanced Encryption Standard,Cryptography,Computer science,Smart card,Throughput,Embedded system,Low-power electronics
Conference
ISBN
Citations 
PageRank 
1-4244-0395-2
2
0.43
References 
Authors
2
3
Name
Order
Citations
PageRank
G. Selimis1314.40
Fournaris, A.P.2382.92
O. Koufopavlou325628.43