Abstract | ||
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This paper presents an effective field-programmable gate array (FPGA)-based hardware implementation of a parallel key searching system for the brute-force attack on RC4 encryption. The design employs several novel key scheduling techniques to minimize the total number of cycles for each key search and uses on-chip memories of the FPGA to maximize the number of key searching units per chip. Based on the design, a total of 176 RC4 key searching units can be implemented in a single Xilinx XC2VP20-5 FPGA chip, which currently costs only a few hundred U.S. dollars. Operating at a 47-MHz clock rate, the design can achieve a key searching speed of 1.07 × 107 keys per second. Breaking a 40-bit RC4 encryption only requires around 28.5 h. |
Year | DOI | Venue |
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2008 | 10.1109/TVLSI.2008.2000670 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
clocks,cryptography,field programmable gate arrays,microprocessor chips,scheduling,RC4 ciphers,RC4 encryption,Xilinx XC2VP20-5 FPGA chip,brute-force attack,clock rate,field-programmable gate array,hardware implementation,key scheduling techniques,on-chip memory,parallel key searching system,Brute-force attack,RC4 encryption,field-programmable gate array (FPGA) | Brute-force attack,Computer science,Cryptography,Field-programmable gate array,Encryption,Electronic engineering,Real-time computing,Gate array,40-bit encryption,RC4,Clock rate,Embedded system | Journal |
Volume | Issue | ISSN |
16 | 8 | 1063-8210 |
Citations | PageRank | References |
10 | 0.83 | 7 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sammy H. M. Kwok | 1 | 10 | 1.16 |
edmund y lam | 2 | 683 | 69.87 |