Name
Abstract | ||
|---|---|---|
Cluster tools have been one of the proposed alternatives to improve operations performance in semiconductor fabrication. The benefits include high yield throughput, less contamination and less human involvement. Perkinson et al. (1994, 1996) developed analytical models to predict the minimum theoretical time required to complete the cycle in a cluster tool. This paper addresses the verification of these analytical models using simulation. Two simulation models were developed -- one with simple configuration and another one that incorporates parallel chambers. The implementation of parallel chambers for the longest process in the cluster tool is tested as the potential area of performance improvement. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/WSC.2008.4736312 | Winter Simulation Conference |
Keywords | Field | DocType |
semiconductor device manufacture,cluster tool operations,parallel chambers,semiconductor fabrication,simulation analysis,wafer fabrication | Computer science,Wafer fabrication,Semiconductor device fabrication,Mean squared error,Electronic engineering,Simulation modeling,Throughput,Performance improvement | Conference |
ISBN | Citations | PageRank |
978-1-4244-2708-6 | 1 | 0.44 |
References | Authors | |
1 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Amit Kumar Gupta | 1 | 81 | 14.84 |
| Peter Lendermann | 2 | 219 | 25.96 |
| Appa Iyer Sivakumar | 3 | 181 | 18.80 |
| John Priyadi | 4 | 1 | 0.44 |