Title
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model
Abstract
In this paper, an ultra-compact I-V nanometer MOS model, suitable for the analysis of digital circuits, is first proposed. All the main physical effects are included through nine parameters and the model is shown to allow an accurate and quick estimation of DC transfer curves or SRAM noise margins.
Year
DOI
Venue
2011
10.1109/ECCTD.2011.6043401
Circuit Theory and Design
Keywords
Field
DocType
MOS digital integrated circuits,MOSFET,SRAM chips,invertors,nanoelectromechanical devices,DC transfer curve estimation,SRAM noise margin evaluation,digital circuit analysis,inverter transfer curve evaluation,ultracompact I-V nanometer MOS model
Inverter,Digital electronics,Semiconductor device modeling,Computer science,Static random-access memory,Electronic engineering,Mosfet circuits,MOSFET,Noise margin,Electrical engineering
Conference
ISBN
Citations 
PageRank 
978-1-4577-0616-5
0
0.34
References 
Authors
1
3
Name
Order
Citations
PageRank
Elio Consoli111711.62
Gianluca Giustolisi25014.17
Gaetano Palumbo3708106.77