Name
Abstract | ||
|---|---|---|
In this paper, an ultra-compact model for nanometer MOS transistors is proposed. Starting from modified and more accurate versions of classical compact models, all the main physical effects that are predominant in nanometer technologies are included in an extremely simple way. Model effectiveness is verified through simulations in a 65-nm CMOS technology. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ECCTD.2011.6043403 | Circuit Theory and Design |
Keywords | Field | DocType |
MOSFET,nanoelectronics,semiconductor device models,CMOS technology,classical compact models,model effectiveness,nanometer MOS transistors,nanometer technologies,size 65 nm,ultra-compact MOS model | Nanoelectronics,Data modeling,Nanocircuitry,Semiconductor device modeling,Computer science,CMOS,Electronic engineering,Nanometre,MOSFET,Transistor | Conference |
ISBN | Citations | PageRank |
978-1-4577-0616-5 | 0 | 0.34 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Elio Consoli | 1 | 117 | 11.62 |
| Gianluca Giustolisi | 2 | 50 | 14.17 |
| Gaetano Palumbo | 3 | 708 | 106.77 |