Name
Abstract | ||
|---|---|---|
Networks-on-Chip (NoCs) have appeared as design strategy to overcome the limitations, in terms of scalability, efficiency, and power consumption of current buses. In this paper, we discuss the idea of using NoCs to monitor system behaviour at run-time by tracing activities at initiators and targets. Main goal of the monitoring system is to retrieve information useful for run-time optimization and resources allocation in adaptive systems. Information detected by probes embedded within NIs is sent to a central unit, in charge of collecting and elaborating the data. We detail the design of the basic blocks and analyse the overhead associated with the ASIC implementation of the monitoring system, as well as discussing implications in terms of the additional traffic generated in the NoC. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/DATE.2009.5090726 | Nice |
Keywords | Field | DocType |
application specific integrated circuits,microprocessor chips,monitoring,network-on-chip,resource allocation,system monitoring,ASIC implementation,MPSoCs,adaptive systems,information retrieval,monitoring system,networks-on-chip,resources allocation,run-time monitoring,run-time optimization,system behaviour monitoring | Design strategy,Adaptive system,Computer science,Parallel computing,Network on a chip,Application-specific integrated circuit,Real-time computing,System monitoring,Resource allocation,Tracing,Scalability,Embedded system | Conference |
ISSN | ISBN | Citations |
1530-1591 | 978-1-4244-3781-8 | 14 |
PageRank | References | Authors |
1.02 | 10 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Leandro Fiorin | 1 | 229 | 17.10 |
| Gianluca Palermo | 2 | 938 | 75.81 |
| Cristina Silvano | 3 | 1195 | 92.49 |