Title
A 20Mb/s phase modulator based on a 3.6GHz digital PLL with −36dB EVM at 5mW power
Abstract
This paper introduces a digital-intensive phase modulator circuit, which is able to enforce an arbitrary carrier phase change (up to ±π radians) in one clock sample. For a clock frequency of 40MHz, the modulation error, expressed in terms of error vector magnitude (EVM), is below -36dB for a 20Mb/s QPSK-modulated or a 10Mb/s GMSK-modulated carrier at 3.6GHz.
Year
DOI
Venue
2012
10.1109/ISSCC.2012.6177007
Solid-State Circuits Conference Digest of Technical Papers
Keywords
DocType
ISSN
digital phase locked loops,modulators,quadrature phase shift keying,radio transmitters,gmsk,qpsk,bit rate 10 mbit/s,bit rate 20 mbit/s,digital pll,digital-intensive phase modulator circuit,error vector magnitude,frequency 3.6 ghz,frequency 40 mhz,modulation error,power 5 mw,phase change,phase lock loop,phase locked loops,phase modulation,frequency modulation,tuning
Conference
0193-6530
ISBN
Citations 
PageRank 
978-1-4673-0376-7
3
0.49
References 
Authors
0
4
Name
Order
Citations
PageRank
Giovanni Marzin1785.26
Salvatore Levantino235143.23
Carlo Samori334939.76
Andrea L. Lacaita432042.41