Name
Abstract | ||
|---|---|---|
To achieve high performance in emerging multicores, it is crucial to reduce the number of memory accesses that suffer from very high latencies. However, this should be done with care as improving latency of an access can worsen the latency of another as a result of resource sharing. Therefore, the goal should be to balance latencies of memory accesses issued by an application in an execution phase, while ensuring a low average latency value. Targeting Network-on-Chip (NoC) based multicores, we propose two network prioritization schemes that can cooperatively improve performance by reducing end-to-end memory access latencies. Our first scheme prioritizes memory response messages such that, in a given period of time, messages of an application that experience higher latencies than the average message latency for that application are expedited and a more uniform memory latency pattern is achieved. Our second scheme prioritizes the request messages that are destined for idle memory banks over others, with the goal of improving bank utilization and preventing long queues from being built in front of the memory banks. These two network prioritization-based optimizations together lead to uniform memory access latencies with a low average value. Our experiments with a 4×8 mesh network-based multicore show that, when applied together, our schemes can achieve 15%, 10% and 13% performance improvement on memory intensive, memory non-intensive, and mixed multiprogrammed workloads, respectively. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/MICRO.2012.35 | Microarchitecture |
Keywords | Field | DocType |
multiprocessing systems,network-on-chip,NoC-based multicores,bank utilization,end-to-end memory access latency addressing,execution phase,idle memory banks,latency value,memory access number reduction,memory intensive workload,memory latency pattern,memory nonintensive workload,memory response messages,mesh network-based multicore,message latency,mixed multiprogrammed workload,network prioritization-based optimizations,network-on-chip-based multicores,request messages,resource sharing | Registered memory,Interleaved memory,Uniform memory access,Computer science,Parallel computing,Cache-only memory architecture,Real-time computing,Memory management,Non-uniform memory access,Distributed shared memory,Flat memory model,Embedded system | Conference |
ISSN | ISBN | Citations |
1072-4451 | 978-1-4673-4819-5 | 19 |
PageRank | References | Authors |
0.76 | 22 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Akbar Sharifi | 1 | 123 | 5.99 |
| Emre Kultursay | 2 | 265 | 11.46 |
| Mahmut T. Kandemir | 3 | 7371 | 568.54 |
| Chita R. Das | 4 | 1467 | 80.03 |