Name
Abstract | ||
|---|---|---|
As SRAM cells are scaled aggressively to increase the overall packing density, the smaller transistors exhibit higher degrees of process variation and mismatch, leading to larger offset voltages. For SRAM sense amplifiers (SAs), higher offset voltages lead to an increased likelihood of an incorrect decision. In this brief, an SA capable of cancelling the input offset voltage is presented. The simulated and measured results in 180-nm technology show that the SA is capable of detecting a 4-mV differential input signal under dc and transient conditions. The proposed SA when compared with other offset cancellation schemes exhibits comparable offset cancellation performance with a smaller delay and significantly lower energy consumption. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/TCSII.2013.2268312 | Circuits and Systems II: Express Briefs, IEEE Transactions |
Keywords | Field | DocType |
SRAM chips,amplifiers,SRAM cells,SRAM sense amplifiers,energy consumption,energy efficient offset cancelling sense amplifier,offset cancellation performance,offset voltages,overall packing density,process variation,transistors,Current sense amplifier (SA),offset cancellation,static random access memory (SRAM),threshold voltage mismatch | Sense amplifier,Input offset voltage,Control theory,Voltage,Static random-access memory,Electronic engineering,Process variation,Transistor,Electrical engineering,Offset (computer science),Mathematics,Amplifier | Journal |
Volume | Issue | ISSN |
60 | 8 | 1549-7747 |
Citations | PageRank | References |
9 | 0.67 | 5 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jaspal Singh Shah | 1 | 21 | 2.12 |
| David Nairn | 2 | 9 | 0.67 |
| Manoj Sachdev | 3 | 669 | 88.45 |