A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC - Citegraph

Paper Info

Title
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC

Abstract
In order to optimize global energy efficiency in the context of dynamic Process-Voltage-Temperature variations in advanced nodes, a fine-grain Adaptive Voltage and Frequency Scaling architecture is proposed and implemented on a 32 nm GALS Multi-Processor SoC. Each Processing Element is an independent Voltage-Frequency island and shows up to 18.2% energy gains due to local adaptability. Compared to a worst case approach, our proposal also allows a frequency boosting around 25% for a total area overhead of 10% including local frequency/voltage actuators, sensors and digital controller.

Year	DOI	Venue
2013	10.1109/ESSCIRC.2013.6649071	ESSCIRC
Keywords	Field	DocType
system-on-chip,gals mpsoc,gals multiprocessor soc,digital controller,dynamic process-voltage-temperature variations,fine grain variation-aware dynamic vdd-hopping avfs architecture,fine-grain adaptive voltage-frequency scaling architecture,frequency boosting,global energy efficiency,globally asynchronous-locally synchronous mpsoc,independent voltage-frequency island,local frequency-voltage actuators,processing element,sensors,size 32 nm,system on chip	Adaptability,System on a chip,Computer science,Efficient energy use,Voltage,Electronic engineering,Frequency scaling,Boosting (machine learning),Digital control,MPSoC,Embedded system	Conference
ISSN	ISBN	Citations
1930-8833	978-1-4799-0643-7	0
PageRank	References	Authors
0.34	6	13

Authors (13 rows)

Cited by (0 rows)

References (6 rows)

Name	Order	Citations	PageRank
edith beigne	1	0	0.34
ivan miropanades	2	0	0.34
Yvain Thonnart	3	349	32.39
l alacoque	4	0	0.34
Pascal Vivet	5	606	53.09
Suzanne Lesecq	6	111	20.60
Diego Puschini	7	71	10.76
Farhat Thabet	8	0	0.68
benoit tain	9	0	0.34
k benchehida	10	0	0.34
Sylvain Engels	11	17	4.72
ronald e wilson	12	0	0.34
Didier Fuin	13	114	6.33

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