Paper Info
Title
Fault diagnosis of TSV-based interconnects in 3-D stacked designs
Abstract
Through-silicon vias (TSVs) are crucial elements of 3-D bonded integrated circuits. Since they connect different layers of 3-D stacks, their proper operation is an essential prerequisite for the system function. This paper describes a procedure for deriving fault diagnosis test sequences to identify single and multiple defective TSVs. Additional experimental results obtained for pseudorandom patterns illustrate feasibility and robustness of the proposed test schemes in terms of their detection and diagnostic capabilities and are reported herein.
Year
DOI
Venue
2013
10.1109/TEST.2013.6651894
Test Conference
Keywords
Field
DocType
fault diagnosis,integrated circuit design,integrated circuit interconnections,three-dimensional integrated circuits,3D bonded integrated circuits,3D stacked designs,TSV-based interconnects,detection capabilities,diagnostic capabilities,fault diagnosis test sequences,pseudorandom patterns,single defective through-silicon vias,single multiple through-silicon vias
Stack (abstract data type),Computer science,Electronic engineering,Robustness (computer science),Integrated circuit design,Integrated circuit,Pseudorandom number generator
Conference
ISSN
Citations 
PageRank 
1089-3539
6
0.50
References 
Authors
32
2
Name
Order
Citations
PageRank
Janusz Rajski12460201.28
Jerzy Tyszer283874.98