Paper Info
Title
DR-SNUCA: An energy-scalable dynamically partitioned cache
Abstract
Multicore processors have become ubiquitous across many domains, such as datacenters and smartphones. As the number of processing elements increases within these processors, so does the pressure to share the critical on-chip cache resources, but this must be done energy-efficiently and without sacrificing resource guarantees. We propose a scalable dynamic cache-partitioning scheme, DR-SNUCA, which provides an energy-efficient way to reduce resource interference over caches shared among many processing elements. Our results show that DR-SNUCA reduces system energy consumption by 16.3% compared to associatively partitioned caches, such as DNUCA.
Year
DOI
Venue
2013
10.1109/ICCD.2013.6657096
Computer Design
Keywords
Field
DocType
cache storage,energy conservation,multiprocessing systems,power aware computing,DR-SNUCA scheme,critical on-chip cache resources,data centers,energy consumption reduction,energy-scalable dynamically partitioned cache,multicore processors,processing elements,resource guarantees,resource sharing,smart phones
Cache invalidation,Cache pollution,Computer science,Snoopy cache,Cache,Parallel computing,Page cache,Real-time computing,Cache algorithms,Cache coloring,Smart Cache
Conference
Citations 
PageRank 
References 
0
0.34
8
Authors
3
Name
Order
Citations
PageRank
Anshuman Gupta100.34
Jack Sampson239832.45
Michael Bedford Taylor31707154.51