Title
Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology
Abstract
This paper presents a sensitivity study to ionizing particles, which are caused by cosmic rays, on a particular combinatorial function of an ST 65nm CMOS technology SAR ADC. A methodology for this study is exposed along with the simulation results. A geometrical visualization of the impacts shows the influence of the impact location effects on the function during operation. An ADC operating cycle analysis is made related to the impact effects showing combinatorial and memorization errors.
Year
DOI
Venue
2013
10.1109/MWSCAS.2013.6674630
Circuits and Systems
Keywords
Field
DocType
cmos integrated circuits,analogue-digital conversion,combinational circuits,cosmic ray interactions,radiation hardening (electronics),cmos technology,sar adc,combinatorial errors,combinatorial logic circuits,cosmic ray impact,geometrical visualization,impact location effects,ionizing particles,memorization errors,single-event transient,single-event upset,size 65 nm,successive approximation register analog-to-digital converters,word length 8 bit,cosmic rays,sar analog to digital converter,charge collection model,critical charge,single-event transient (set),single-event upset (seu),cosmic ray
Cosmic ray,Visualization,Computer science,Electronic engineering,Combinational logic,CMOS,Successive approximation ADC,Electronic circuit,Electrical engineering,Ionizing particles
Conference
ISSN
Citations 
PageRank 
1548-3746
1
0.43
References 
Authors
2
4
Name
Order
Citations
PageRank
Gomez Toro, D.120.80
Seguin, F.210.43
Matthieu Arzel36915.10
Jézéquel, M.410.43