Name
Abstract | ||
|---|---|---|
This paper addresses the problem of logic diagnosis of System-on-Chip (SoC). We propose a diagnosis approach based on a matching algorithm between a set of predicted failures and the set of failures observed during the test phase. The result of the diagnosis is a ranked list of suspected nets able to explain the observed failures. Experimental results show the diagnosis accuracy of the proposed approach in terms of absolute number of suspects. Moreover, a comparison with an industrial reference tool highlights the reliability of our approach. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ATS.2010.49 | Asian Test Symposium |
Keywords | Field | DocType |
sequential circuits,matching algorithm,reliability,fault model,predictive models,dictionaries,soc,system on chip,system on a chip | Sequential logic,System on a chip,Ranking,Computer science,Fault modeling,Circuit reliability,Real-time computing,Electronic engineering,Blossom algorithm | Conference |
ISSN | ISBN | Citations |
1081-7735 | 978-1-4244-8841-4 | 1 |
PageRank | References | Authors |
0.36 | 10 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Y. Benabboud | 1 | 4 | 1.49 |
| A. Bosio | 2 | 113 | 15.51 |
| L. Dilillo | 3 | 44 | 9.49 |
| P. Girard | 4 | 478 | 41.91 |
| S. Pravossoudovitch | 5 | 689 | 54.12 |
| A. Virazel | 6 | 169 | 23.25 |
| O. Riewer | 7 | 1 | 0.36 |