Name
Title | ||
|---|---|---|
An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization |
Abstract | ||
|---|---|---|
The intention of this work is to realize a power and area-efficient 50MS/S ΔΣ modulator with an OSR of only 10, an effective linearization without DEM, and a very low power ELD compensation. This is achieved by using a digital DAC error estimation and correction, and a compensation for finite gain-bandwidth (FGBW) in all feedback amplifiers. A multi-bit 3rd-order, mixed feedforward-feedback compensation is used, which avoids the second DAC, limiting the swing of the first opamp, while reducing the STF peaking compared to an all feedforward topology. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISSCC.2011.5746402 | Solid-State Circuits Conference Digest of Technical Papers |
Keywords | Field | DocType |
delta-sigma modulation,error compensation,feedback amplifiers,operational amplifiers,ΔΣ modulator,FGBW,OSR,SFDR,STF peaking,digital DAC error correction,digital DAC error estimation,digital background DAC linearization,feedback amplifier,finite gain-bandwidth,low power ELD compensation,mixed feedforward-feedback compensation,opamp | Computer science,Sampling (signal processing),Integrator,Spurious-free dynamic range,Negative feedback amplifier,Electronic engineering,Delta-sigma modulation,Jitter,Electrical engineering,Operational amplifier,Filter design | Conference |
ISSN | ISBN | Citations |
0193-6530 | 978-1-61284-303-2 | 10 |
PageRank | References | Authors |
1.69 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| John G. Kauffman | 1 | 36 | 9.06 |
| Pascal Witte | 2 | 43 | 7.25 |
| Joachim Becker | 3 | 88 | 18.25 |
| Maurits Ortmanns | 4 | 501 | 114.46 |