Name
Title | ||
|---|---|---|
A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters |
Abstract | ||
|---|---|---|
This paper presents a reconfigurable architecture for coherent built-in self-testing (BIST) of high speed analog-to-digital converters (ADCs) with moderate resolutions. The proposed system is suited to be fully integrated with the ADC and, besides a low jitter clock reference, no other external high quality generators are required. The complete system comprises two synchronized phase-locked loops (PLLs), one based on a two-integrator oscillator capable of providing low distortion outputs and another based on a relaxation oscillator providing low jitter squared output, to allow coherent sampling. A detailed description of the building blocks of both PLLs is given as well as the techniques used to minimize area of the loop filters (LFs), to stabilize the output amplitude of the two-integrator oscillator to a known value, and to improve the total harmonic distortion (THD) of this oscillator. Post-layout simulations, in a 0.13 μm CMOS technology, of the proposed BIST scheme applied to a case-study 6-bit 1 GS/s ADC are shown and validate the proposed test methodology. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/TCSI.2011.2143230 | Circuits and Systems I: Regular Papers, IEEE Transactions |
Keywords | Field | DocType |
CMOS integrated circuits,analogue-digital conversion,built-in self test,clocks,harmonic distortion,jitter,oscillators,phase locked loops,reconfigurable architectures,ADC,BIST,CMOS technology,LF,PLL,THD,built-in self-testing,coherent sampling,fully integrated architecture,high speed analog-to-digital converter,integrator oscillator,jitter clock reference,loop filter,moderate resolutions,phase-locked loop,reconfigurable architecture,relaxation oscillator,size 0.13 mum,total harmonic distortion,word length 6 bit,Analog-to-digital converters (ADCs),built-in self-test (BIST),coherent test,phase-locked loops (PLLs) | Phase-locked loop,Relaxation oscillator,Total harmonic distortion,Coherent sampling,Control theory,CMOS,Converters,Electronic engineering,Jitter,Distortion,Mathematics | Journal |
Volume | Issue | ISSN |
58 | 7 | 1549-8328 |
Citations | PageRank | References |
3 | 0.44 | 9 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Edinei Santin | 1 | 4 | 2.22 |
| Luís Bica Oliveira | 2 | 57 | 20.20 |
| Blazej Nowacki | 3 | 22 | 4.19 |
| João Goes | 4 | 88 | 27.95 |