Paper Info
Title
A low-power VLIW processor for 3GPP-LTE complex numbers processing
Abstract
New generation of telecommunication applications requires highly efficient processing units to tackle with the increasing signal processing algorithmic complexity. They also need to be flexible for handling a large range of radio access technology with specifications moving very fast. As devices including telecommunication features are, per nature, mobile, the high level of flexibility must be achieved while preserving very low power consumption. In this paper, a high performance low-power application-specific processor is proposed for complex signal processing. Thanks to dedicated control architecture, this processor exhibits an average 81% utilization rate of its principal operator, a complex MAC for a 3GPP-LTE application. The main innovations are the use of a reconfigurable profile and instruction cache strategy to reduce power consumption. This leads to a 10× reduction of the control power consumption. As a result, an average 50 mW power consumption is measured after implementation in a low-power 65 nm technology while delivering 3.2 GOPS. Finally, a comparison with state-of-the-art low-power DSP shows at least 24 % gain.
Year
DOI
Venue
2011
10.1109/DATE.2011.5763048
Design, Automation & Test in Europe Conference & Exhibition
Keywords
Field
DocType
3G mobile communication,Long Term Evolution,cache storage,digital signal processing chips,instruction sets,low-power electronics,radio access networks,3GPP-LTE complex numbers processing,complex MAC,complex signal processing,control architecture,high performance low-power application-specific processor,instruction cache,low power consumption,low-power DSP,low-power VLIW processor,new generation telecommunication application,power 50 mW,radio access technology,signal processing algorithmic complexity,size 65 nm,utilization rate,3GPP-LTE,Digital Baseband,Low-Power,Signal processor,VLIW
Signal processing,Digital signal processing,Computer science,Instruction set,Very long instruction word,Cache,Digital signal processor,Parallel computing,Real-time computing,Radio access technology,Embedded system,Low-power electronics
Conference
ISSN
ISBN
Citations 
1530-1591
978-1-61284-208-0
8
PageRank 
References 
Authors
0.74
5
2
Name
Order
Citations
PageRank
Christian Bernard1465.36
Fabien Clermidy279761.56