Name
Title | ||
|---|---|---|
Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing |
Abstract | ||
|---|---|---|
This paper presents a new approach for generating saturation constraints and DC performance expressions for analog integrated circuits. It also proposes a generalized method to develop AC performance expressions of the same in posynomial form. The developed posynomial expressions can be used for well established geometric programming (GP) based sizing optimization. The equation generation method takes very less time and does not require any manual intervention. The proposed method for AC performance expression generation is built on two levels of abstraction of a circuit. At the higher level, referred as macromodel, circuit performance metrics are modeled as function of device parameters such as transconductance (gm), drain conductance (gd), small-signal parasitic capacitances and overdrive voltage (Vov). Whereas, at lower level of the abstraction the device parameters are monomial functions of device sizes and their biases. The two-level abstraction helps to develop technology independent performance model of a circuit. Whereas, the technology dependency is captured through device models. The proposed methods are applied to two well-known CMOS op-amp topologies namely, two-stage and folded-cascode to generate saturation constraints, DC and AC performance expressions. With the developed constraints, both the circuits are designed through GP based circuit optimization in a 0.18 μm UMC technology. Performances of both are verified at their final design points. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISQED.2011.5770815 | Quality Electronic Design |
Keywords | Field | DocType |
CMOS analogue integrated circuits,circuit optimisation,geometric programming,integrated circuit design,number theory,operational amplifiers,AC performance expression generation,CMOS op-amp topology,DC macromodel,DC performance expression generation,GP based circuit optimization,UMC technology,analog circuit sizing optimization,analog integrated circuits,automatic saturation constraint generation,circuit performance metrics,circuit performance model,equation generation method,geometric programming,monomial functions,posynomial expression,size 0.18 mum,two-level abstraction,Geometric Programming,Macromodel,Posynomial | Posynomial,Expression (mathematics),Semiconductor device modeling,Computer science,Electronic engineering,Integrated circuit design,Electronic circuit,Geometric programming,Integrated circuit,Operational amplifier | Conference |
ISSN | ISBN | Citations |
1948-3287 | 978-1-61284-913-3 | 5 |
PageRank | References | Authors |
0.47 | 9 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Supriyo Maji | 1 | 6 | 0.82 |
| Samiran Dam | 2 | 5 | 0.47 |
| Pradip Mandal | 3 | 84 | 23.04 |