Name
Title | ||
|---|---|---|
Complementary Nano-Electro-Mechanical Switch for ultra-low-power applications: Design and modeling |
Abstract | ||
|---|---|---|
To address the CMOS power consumption in portable embedded system application, we present a low power four terminal metallic Nano-Electro-Mechanical Switch (NEMS). The NEMS offers unique characteristics in terms of turn on voltage (≈ 1V), switching time (≈ 1ns), virtually zero leakage current, infinite ON current, and a small footprint size. In this paper, we present the NEMS design, its physical device model and a corresponding circuit simulation model. Similar to NMOS and PMOS, the NEMS is configured into N-channel (NNEMS) and P-channel (PNEMS) enabling the realization of logic gates and flip-flops in Complementary (CNEMS) logic similar to CMOS. Consequently, CNEMS logic and sequential circuits are realized by utilizing CMOS design concepts and methodologies. Furthermore, this switch has simple structure that enables its fabrication using CMOS like process. To demonstrate the power efficiency of switch when used in portable embedded systems, we have designed a set of benchmark circuits in both CMOS and CNEMS and compared them in term of power consumptions. For CMOS we use HSPICE simulator to compute the power. To evaluate the power of CNEMS circuits, we derived a CNEMS circuit simulation model and a corresponding CNEMS circuit simulator. To insure the CNEMS circuit simulator accuracy, the CNEMS circuit simulation model is calibrated with the CNEMS physical device model. Our experiment showed that the energy of CNEMS technology is much lower than Nanometer-CMOS technology. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISQED.2011.5770810 | Quality Electronic Design |
Keywords | Field | DocType |
CMOS logic circuits,SPICE,circuit simulation,field effect transistor switches,flip-flops,leakage currents,logic gates,low-power electronics,nanoelectromechanical devices,sequential circuits,CMOS power consumption,CNEMS circuit simulation model,CNEMS logic,CNEMS physical device model,HSPICE simulator,N-channel NEMS,NEMS design,P-channel NEMS,benchmark circuits,circuit simulation model,complementary NEMS logic,complementary nanoelectromechanical switch,flip-flops,infinite ON current,logic gates,low power four terminal metallic nanoelectromechanical switch,portable embedded system application,sequential circuits,ultra-low-power application,virtually zero leakage current | Logic gate,Sequential logic,NMOS logic,Computer science,CMOS,Electronic engineering,PMOS logic,Electronic circuit,Electronic circuit simulation,Electrical engineering,Low-power electronics | Conference |
ISSN | ISBN | Citations |
1948-3287 | 978-1-61284-913-3 | 1 |
PageRank | References | Authors |
0.38 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Khawla Alzoubi | 1 | 1 | 0.38 |
| Saab, D.G. | 2 | 186 | 20.19 |
| Sijing Han | 3 | 1 | 0.38 |
| Massood Tabib-Azar | 4 | 25 | 4.19 |