Abstract | ||
---|---|---|
This paper presents an oscillator-based TRNG (true random number generator) with jitter amplifier. The proposed jitter amplifier fabricated in a 65nm CMOS process archives 8.4× gain at 25°C, and significantly improves randomness of output bitstream. The TRNG with the jitter amplifier enhances throughput per area by 94% compared to a TRNG with frequency dividers. The prototype TRNG occupies 6,300 μm2, generates 2 Mbps random bitstreams, and passes FIPS 140-2 randomness tests and 12 tests in NIST test suite. |
Year | DOI | Venue |
---|---|---|
2011 | 10.1109/ISCAS.2011.5937668 | Circuits and Systems |
Keywords | Field | DocType |
CMOS analogue integrated circuits,amplifiers,jitter,oscillators,random number generation,CMOS process,jitter amplifier,oscillator-based TRNG,size 65 nm,temperature 25 C,true random number generator | Computer science,Electronic engineering,Randomness tests,NIST,Throughput,Jitter,Random number generation,Bitstream,Amplifier,Randomness | Conference |
ISSN | ISBN | Citations |
0271-4302 E-ISBN : 978-1-4244-9472-9 | 978-1-4244-9472-9 | 5 |
PageRank | References | Authors |
0.63 | 7 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Takehiko Amaki | 1 | 23 | 3.28 |
Masanori Hashimoto | 2 | 462 | 79.39 |
Takao Onoye | 3 | 329 | 68.21 |