Title
Hardware task scheduling for heterogeneous soc architectures
Abstract
This paper presents our work on extending artificial neural networks use for real-time task scheduling to heterogeneous System-on-Chip architectures. The Hopfield model is the neural network model considered in this study. We introduce new constructing rules to design neural network so that architecture heterogeneity can be considered. We show that these new rules ensure the network stabilization on states that take into account the architecture heterogeneity while meeting the imposed task constraints.
Year
Venue
Keywords
2007
EUSIPCO
neural nets,scheduling,system-on-chip,task analysis,hopfield model,architecture heterogeneity,artificial neural networks,hardware task scheduling,heterogeneous soc architectures,network stabilization,convergence,scheduling algorithms,hardware,real time systems
Field
DocType
ISBN
Convergence (routing),Architecture,Fair-share scheduling,Scheduling (computing),Computer science,Stochastic neural network,Types of artificial neural networks,Time delay neural network,Artificial neural network,Distributed computing
Conference
978-839-2134-04-6
Citations 
PageRank 
References 
0
0.34
11
Authors
4
Name
Order
Citations
PageRank
Imene Benkermi100.34
Daniel Chillet219326.12
Pillement, Sebastien3335.30
Olivier Sentieys459773.35