Title | ||
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Towards FHE in Embedded Systems: A Preliminary Co-Design Space Exploration of a HW/SW Very Large Multiplier |
Abstract | ||
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The integration of fully homomorphic encryption (FHE) into embedded systems is limited due to its huge computational requirements. FHE requires multiplications of operands up to millions of bits. Current implementations use high-end and parallel processors, leading to high-power consumption. We propose a hardware-software system to benefit from the best of hardware (performance/low-power) and software (flexibility) capabilities. In this letter we present our first co-design results for hardware dedicated multiplication units, which is used as atomic operations by the software layer. We report FPGA implementation results for those units and software performance estimations of their use in multiplications up to 16 millions-bit operands. In range of 10W power consumption, our analysis show that good FHE performance is affordable. |
Year | DOI | Venue |
---|---|---|
2015 | 10.1109/LES.2015.2436372 | Embedded Systems Letters, IEEE |
Keywords | Field | DocType |
FHE,HW/SW co-design,cryptography,large operands,multiplication | Homomorphic encryption,Computer architecture,Computer science,Parallel computing,Operand,Field-programmable gate array,Software performance testing,Multiplier (economics),Encryption,Software,Multiplication,Embedded system | Journal |
Volume | Issue | ISSN |
PP | 99 | 1943-0663 |
Citations | PageRank | References |
2 | 0.36 | 7 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ghada Y. Abozaid | 1 | 2 | 0.36 |
Arnaud Tisserand | 2 | 2 | 0.36 |
Ahmed El-Mahdy | 3 | 52 | 13.89 |
Yasutaka Wada | 4 | 72 | 11.19 |