Yasutaka Wada - Citegraph

Author Info

Name	Affiliation	Papers
YASUTAKA WADA	Univ Electrocommun, Grad Sch Informat Syst, Tokyo 1828585, Japan	18
Collaborators	Citations	PageRank
53	72	11.19
Referers	Referees	References
206	358	129

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100358

Publications (18 rows)

Collaborators (53 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
An FPGA-Based Image Recognition with Remote Update Functions for Autonomous Driving on “ad-refkit”	0	0.34	2021
Towards the Improvement of Training Efficiency and Image Recognition Accuracy for an FPGA Controlled Mini-Car by Offloading Neural Network Training	0	0.34	2019
A Power Management Framework with Simple DSL for Automatic Power-Performance Optimization on Power-Constrained HPC Systems.	0	0.34	2018
Development of an FPGA Controlled "Mini-Car" Toward Autonomous Driving	1	0.39	2018
Towards FHE in Embedded Systems: A Preliminary Co-Design Space Exploration of a HW/SW Very Large Multiplier	2	0.36	2015
A Linear Time and Space Algorithm for Optimal Traffic-Signal Duration at an Intersection	1	0.35	2013
A Scalable Multiplier for Arbitrary Large Numbers Supporting Homomorphic Encryption	3	0.41	2013
A parallelizing compiler cooperative heterogeneous multicore processor architecture	2	0.38	2011
Efficient parallel implementations of controlled optimization of traffic phases	2	0.39	2011
A 45-Nm 37.3 Gops/W Heterogeneous Multi-Core Soc With 16/32 Bit Instruction-Set General-Purpose Core	0	0.34	2011
A 45nm 37.3GOPS/W heterogeneous multi-core SoC	14	1.14	2010
Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores	6	0.75	2010
Software-cooperative power-efficient heterogeneous multi-core for media processing	4	0.52	2008
Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API	5	0.58	2008
Power-Aware Compiler Controllable Chip Multiprocessor	2	0.61	2007
Multigrain parallel processing on compiler cooperative chip multiprocessor	11	1.61	2005
Performance evaluation of compiler controlled power saving scheme	2	0.60	2005
Compiler control power saving scheme for multi core processors	17	1.75	2005

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