Name
Title | ||
|---|---|---|
Integration of dual channel timing formatter system for high speed memory test equipment |
Abstract | ||
|---|---|---|
This paper proposes a dual channel timing formatter system for high speed memory test equipment. The proposed architecture supports 256 kinds of waveform with 20ps timing resolution. Moreover, timing problem is reduced because a timing generator is embedded. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/ISOCC.2012.6407070 | ISOCC |
Keywords | Field | DocType |
automatic test equipment,integrated memory circuits,timing circuits,dual channel timing formatter system,high speed memory test equipment,timing generator,timing resolution,ate,memory test,timing formatter | Test equipment,Computer science,Automatic test equipment,Waveform,Communication channel,Real-time computing,Electronic engineering,Static timing analysis,High speed memory,Computer hardware,Timing generator | Conference |
ISSN | ISBN | Citations |
2163-9612 | 978-1-4673-2988-0 | 11 |
PageRank | References | Authors |
1.57 | 4 | 12 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| jaeseok park | 1 | 11 | 1.90 |
| ingeol lee | 2 | 12 | 2.28 |
| youngseok park | 3 | 11 | 1.57 |
| sunggeun kim | 4 | 12 | 2.61 |
| Kyung Ho Ryu | 5 | 14 | 2.37 |
| Dong-Hoon Jung | 6 | 52 | 9.16 |
| kangwook jo | 7 | 11 | 1.57 |
| choong keun lee | 8 | 11 | 2.24 |
| Hongil Yoon | 9 | 89 | 19.52 |
| Seong-ook Jung | 10 | 332 | 53.74 |
| Woo-Young Choi | 11 | 165 | 30.79 |
| Sungho Kang | 12 | 436 | 78.44 |