Paper Info
Title
Communication cost reduction for hardware tasks placed on homogeneous reconfigurable resource
Abstract
The management of a reconfigurable resource included in a System-on-Chip is a difficult problem due to spatial resource allocation to ensure for each new task to schedule. This problem becomes more difficult when the communications between tasks are also considered during the task placement. General techniques developed and proposed in the literature ignore this problem and generate solutions which can produce difficulties to manage the data exchanges onto the communication media.We claim that, even if some methods seem very interesting, due to low task rejection rate, the placement must be realized with the objective to avoid the risk of communication bottleneck during the tasks exchanges. This paper addresses this research topic by extending one specific method of tasks management, based on a Vertex List which enables a fast and efficient evaluation of task position into the reconfigurable resource. The method proposed consists in evaluating all the vertices and finding the best vertex to limit the communication cost. Results show that, our method reduces significantly the communication cost, up to 24% compared to the best solutions produced by some other existing methods.
Year
Venue
Keywords
2013
Design and Architectures for Signal and Image Processing
system-on-chip,System-on-Chip,Vertex List,communication cost reduction,homogeneous reconfigurable resource,media communication,spatial resource allocation
Field
DocType
Citations 
Bottleneck,System on a chip,Vertex (geometry),Computer science,Homogeneous,Real-time computing,Resource allocation,Rejection rate,Cost reduction,Distributed computing
Conference
1
PageRank 
References 
Authors
0.39
6
2
Name
Order
Citations
PageRank
Quang-Hai Khuat110.39
Daniel Chillet219326.12