Name
Abstract | ||
|---|---|---|
In this paper, a low-power single-phase clock multiband flexible divider for Bluetooth, Zigbee, and IEEE 802.15.4 and 802.11 a/b/g WLAN frequency synthesizers is proposed based on pulse-swallow topology and is implemented using a 0.18-$\mu{\hbox {m}}$ CMOS technology. The multiband divider consists of a proposed wideband multimodulus 32/33/47/48 prescaler and an improved bit-cell for swallow (S) counter and can divide the frequencies in the three bands of 2.4–2.484 GHz, 5.15–5.35 GHz, and 5.725–5.825 GHz with a resolution selectable from 1 to 25 MHz. The proposed multiband flexible divider is silicon verified and consumes power of 0.96 and 2.2 mW in 2.4- and 5-GHz bands, respectively, when operated at 1.8-V power supply. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/TVLSI.2010.2100052 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
Bluetooth,clocks,frequency dividers,frequency synthesizers,low-power electronics,Bluetooth,CMOS technology,IEEE 802.11 a/b/g,IEEE 802.15.4,WLAN frequency synthesizers,Zigbee,bit cell,frequency 2.4 GHz to 2.484 GHz,frequency 5.15 GHz to 5.35 GHz,frequency 5.725 GHz to 5.825 GHz,low power single phase clock multiband flexible divider,multiband divider,power 2.2 mW,pulse swallow topology,swallow counter,wideband multimodulus,DFF,E-TSPC,dual modulus prescaler,dynamic logic,frequency synthesizer,high-speed digital circuits,true single-phase clock (TSPC),wireless LAN (WLAN) | Wideband,Logic gate,Frequency divider,Computer science,Dual-modulus prescaler,CMOS,Frequency synthesizer,Electronic engineering,Electrical engineering,Bluetooth,Low-power electronics | Journal |
Volume | Issue | ISSN |
20 | 2 | 1063-8210 |
Citations | PageRank | References |
6 | 0.66 | 4 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vamshi Krishna Manthena | 1 | 6 | 0.66 |
| Manh Anh Do | 2 | 6 | 0.66 |
| Chirn Chye Boon | 3 | 136 | 26.81 |
| Kiat Seng Yeo | 4 | 365 | 63.72 |