Name
Abstract | ||
|---|---|---|
Multiprocessor systems-on-chip (MPSoC) are evolving into heterogeneous architectures based on one host processor plus many-core accelerators. While heterogeneous SoCs promise higher performance/watt, they are programmed at the cost of major code rewrites with low-level programming abstractions (e.g, OpenCL). We present a programming model based on OpenMP, with additional directives to program the accelerator from a single host program. As a test case, we evaluate an implementation of this programming model for the STMicroelectronics STHORM development board. We obtain near-ideal throughput for most benchmarks, very close performance to hand-optimized OpenCL codes at a significantly lower programming complexity, and up to speedup versus host execution time. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TII.2015.2449994 | IEEE Transactions on Industrial Informatics |
Keywords | Field | DocType |
Heterogeneous SoC,Heterogeneous systems-on-chip (SoC),NUMA,OpenMP,many core,many-core,nonuniform memory access (NUMA) | System on a chip,Programming paradigm,Computer science,Parallel computing,Field-programmable gate array,Real-time computing,Multiprocessing,Throughput,Programming complexity,MPSoC,Speedup,Embedded system | Journal |
Volume | Issue | ISSN |
11 | 4 | 1551-3203 |
Citations | PageRank | References |
8 | 0.64 | 23 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Andrea Marongiu | 1 | 337 | 39.19 |
| Alessandro Capotondi | 2 | 39 | 8.25 |
| Giuseppe Tagliavini | 3 | 71 | 9.36 |
| Luca Benini | 4 | 13116 | 1188.49 |