Abstract | ||
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The new programmable and automatically adjustable off-chip driver (OCD) and the on-die terminator (ODT) for DDR3-SRAM interface are proposed to widen the valid data widow. The proposed OCD fills the role of the ODT, and the OCD and the ODT play a role in ESD protection circuit. The application of 72Mb DDR3 SRAM provides 1.5GHz data rate, and the valid data window of DDR input signal is 540pS. The proposed programmable impedance controller (PIC) maintains constant resistance of the ODT within 3% variation, and supports DDR3-SRAM MODE. The new scheme of updating impedance control codes to maintain uniform impedance and the stable power-up sequence for the ODT are also suggested. |
Year | DOI | Venue |
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2003 | 10.1109/CICC.2003.1249425 | PROCEEDINGS OF THE IEEE 2003 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | DocType | Citations |
electrostatic discharge,chip | Conference | 3 |
PageRank | References | Authors |
0.87 | 1 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nam-seog Kim | 1 | 243 | 19.71 |
Yong-jin Yoon | 2 | 8 | 2.96 |
Uk-rae Cho | 3 | 37 | 8.38 |
Hyun-geun Byun | 4 | 34 | 16.20 |