Name
Abstract | ||
|---|---|---|
Correctly estimating the speed-up of a parallel embedded application is crucial to efficiently compare different parallelization techniques, task graph transformations or mapping and scheduling solutions. Unfortunately, especially in case of control-dominated applications, task correlations may heavily affect the execution time of the solutions and usually this is not properly taken into account during performance analysis. We propose a methodology that combines a single profiling of the initial sequential specification with different decisions in terms of partitioning, mapping, and scheduling in order to better estimate the actual speed-up of these solutions. We validated our approach on a multi-processor simulation platform: experimental results show that our methodology, effectively identifying the correlations among tasks, significantly outperforms existing approaches for speed-up estimation. Indeed, we obtained an absolute error less than 5 % in average, even when compiling the code with different optimization levels. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1007/s10766-015-0372-7 | International Journal of Parallel Programming |
Keywords | Field | DocType |
Performance estimation, Path profiling, Hierarchical Task Graph | Information system,Graph,Scheduling (computing),Profiling (computer programming),Computer science,Parallel computing,Performance estimation,Embedded applications,Theoretical computer science,Software,Approximation error | Journal |
Volume | Issue | ISSN |
44 | 4 | 1573-7640 |
Citations | PageRank | References |
0 | 0.34 | 34 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Marco Lattuada | 1 | 40 | 11.41 |
| Christian Pilato | 2 | 329 | 32.19 |
| Fabrizio Ferrandi | 3 | 548 | 56.95 |