Paper Info
Title
Design Of Contact Less Wafer-Level Tsv Connectivity Testing Structure Using Capacitive Coupling
Abstract
Driven by the abrupt miniaturization of mobile devices and demand for 3D-1C, Through Silicon Via (TSV) has been highlighted as the key technology for compactly integrating multiple dies of various functions as a whole system. However, due to the instability in the TSV fabrication process, various types of disconnection defects can be resulted during fabrication steps, resulting in a severe decrease in the final chip yield as the number of TSVs and stacked dies increases. In this paper, we propose a novel contactless wafer-level TSV connectivity testing structure using capacitive coupling that can detect TSV disconnection defects on wafer-level. The proposed structure can detect the TSV disconnection by observing the change in the capacitance between adjacent TSVs, using only passive components such as metal pads and lines, without additional power consumption for the testing. Through time-and frequency-domain simulation results, such as transfer impedance and voltage waveforms, we verified that the proposed structure can successfully detect TSV defects, while overcoming the limitations of the conventional direct probing methods.
Year
DOI
Venue
2013
10.1109/EMCCompo.2013.6735192
2013 9TH INTERNATIONAL WORKSHOP ON ELECTROMAGNETIC COMPATIBILITY OF INTEGRATED CIRCUITS (EMC COMPO 2013)
Keywords
DocType
Citations 
disconnection, capacitive coupling, through-silicon via (TSV), TSV test, wafer-level
Conference
0
PageRank 
References 
Authors
0.34
4
8
Name
Order
Citations
PageRank
j j kim100.34
Heegon Kim2157.69
Sukjin Kim3258.02
Bumhee Bae452.43
Daniel H. Jung594.73
Sunkyu Kong662.51
Junho Lee733.45
Kunwoo Park813614.51