Name
Abstract | ||
|---|---|---|
This paper presents a methodology for selecting the architecture and optimizing the circuit design for the first block in a current-mode receiver chain, the low noise transconductance amplifier (LNTA). This methodology includes system-level considerations to select circuit design techniques for noise cancellation, linearity improvement and power reduction. The methodology is applied on an LNTA design in 28nm UTBB-FDSOI CMOS. The selected amplifier topology is designed to operate at 2.4GHz with a transconductance of 15mS. It achieves 2.67dB noise figure (NF), 1dB compression point (P1dB) of -7dBm, 9.5dBm input third order intercept point (IIP3) and consumes 1.5mA from a 1.2V supply. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/NEWCAS.2015.7182012 | 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) |
Keywords | Field | DocType |
Low noise transconductance amplifier(LNTA),current-mode receiver,noise cancellation,UTBB-FDSOI | Low-noise amplifier,Computer science,Operational transconductance amplifier,Noise figure,Y-factor,Electronic engineering,Noise temperature,Effective input noise temperature,Transconductance,Electrical engineering,Noise-figure meter | Conference |
ISSN | Citations | PageRank |
2472-467X | 0 | 0.34 |
References | Authors | |
5 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| d danilovic | 1 | 0 | 0.34 |
| Andreia Cathelin | 2 | 168 | 34.59 |
| Andrei Vladimirescu | 3 | 155 | 37.87 |
| borivoje nikolic | 4 | 6 | 1.87 |