Title
A Cascaded Continuous-Time Sigma Delta Modulator With 67-Db Dynamic Range In 10-Mhz Bandwidth
Abstract
This paper presents the design of a 2-2 cascaded continuous-time sigma-delta modulator. The cascaded modulator comprises two stages with second-order continuous-time resonator loopfilters, 4-bit quantizers, and feedback digital-to-analog converters. The digital noise cancellation filter design is determined using continuous-time to discrete-time transformation of the sigma-delta loopfilter transfer functions. The required matching between the analog and digital filter coefficients is achieved by means of simple digital calibration of the noise cancellation filter. Measurement results of a 0.18-mum CMOS prototype chip demonstrate 67-dB dynamic range in a 10-MHz bandwidth at 8 times oversampling for a single, continuous-time cascaded modulator. Two cascaded modulators in quadrature configuration provide 20-MHz aggregate bandwidth. Measured anti-alias suppression is over 50 dB for input signals in the band from 150 to 170 MHz around the sampling frequency of 160 MHz.
Year
DOI
Venue
2004
10.1109/JSSC.2004.836245
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Keywords
DocType
Volume
analog-to-digital conversion, cascaded sigmadelta modulation, continuous-time sigma-delta modulation, digital calibration, MASH
Journal
39
Issue
ISSN
Citations 
12
0018-9200
17
PageRank 
References 
Authors
3.40
0
3
Name
Order
Citations
PageRank
Lucien J. Breems19920.57
Robert Rutten24212.13
Gunnar Wetzker3173.74