Title
An Energy Efficient 40 Kb SRAM Module With Extended Read/Write Noise Margin in 0.13 $\mu$ m CMOS
Abstract
Based on the dynamic criteria for data stability, we introduce segmented virtual grounding architecture with extended read, write noise margin to realize a low leakage current, energy efficient SRAM module. The architecture offers subthreshold operation for the entire module, except for the selected segments. In addition, a new operational mode for the SRAM cell is introduced which allows only the...
Year
DOI
Venue
2009
10.1109/JSSC.2008.2010815
IEEE Journal of Solid-State Circuits
Keywords
DocType
Volume
Energy efficiency,Random access memory,CMOS technology,Voltage,Stability criteria,Leakage current,Resource description framework,Noise reduction,Working environment noise,Image segmentation
Journal
44
Issue
ISSN
Citations 
2
0018-9200
6
PageRank 
References 
Authors
1.06
11
2
Name
Order
Citations
PageRank
Mohammad Sharifkhani114725.76
Manoj Sachdev266988.45