Name
Abstract | ||
|---|---|---|
In this paper, it is shown that the area optimization problem of a compact slicing floorplan may be formulated as a convex optimization problem when the areas of the analog components are modeled with continuous convex functions of the width (height). It is proved that the area of a compact slicing floorplan is a convex function of its width (height). The convexity is shown for the cases with and without dead (empty) space. This feature can be exploited to efficiently optimize the dimensions of layout components with multiple variants, without enumerating all possible combinations. Layout of a voltage-doubler circuit is used to quantitatively verify the proof. HighlightsWe proved that the area of a compact slicing floorplan is convex.The proof is done without any assumption on constant area.Cases with and without empty space are included in the proof.Layouts with symmetry and proximity constraints are analyzed. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1016/j.vlsi.2015.01.008 | Integration, the VLSI Journal |
Keywords | Field | DocType |
Layout for analog circuits,Slicing floorplan,Area optimization,Convexity of area | Convexity,Mathematical optimization,Computer science,Slicing,Regular polygon,Convex function,Convex optimization,Optimization problem,Floorplan | Journal |
Volume | Issue | ISSN |
50 | C | 0167-9260 |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ahmet Unutulmaz | 1 | 10 | 2.79 |
| Günhan Dündar | 2 | 245 | 37.59 |
| Francisco V. Fernández | 3 | 234 | 40.82 |