Title
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time
Abstract
In this paper a three-stage dynamic-biased CMOS amplifier is designed with a robust optimization of its settling-time performance. The methodology studies the stability of a third order system through the so-called “separation factors” and analyzes the settling time performance through the use of contour plots, in order to define a suitable design strategy. The approach is experimentally validated...
Year
DOI
Venue
2015
10.1109/TCSI.2015.2476396
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
Field
DocType
Transistors,Robustness,Transfer functions,Capacitors,Circuit stability,Stability analysis,Topology
Monte Carlo method,Control theory,Robust optimization,Settling time,Third order,Robustness (computer science),Electronic engineering,Transfer function,Transistor,Mathematics,Amplifier
Journal
Volume
Issue
ISSN
62
11
1549-8328
Citations 
PageRank 
References 
1
0.35
26
Authors
2
Name
Order
Citations
PageRank
Gianluca Giustolisi15014.17
Gaetano Palumbo2708106.77