Title
Low-Power Parallel Chien Search Architecture Using a Two-Step Approach.
Abstract
This brief proposes a new power-efficient Chien search (CS) architecture for parallel Bose-Chaudhuri-Hocquenghem (BCH) codes. For syndrome-based decoding, the CS plays a significant role in finding error locations, but exhaustive computation incurs a huge waste of power consumption. In the proposed architecture, the searching process is decomposed into two steps based on the binary matrix represen...
Year
DOI
Venue
2016
10.1109/TCSII.2015.2482958
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
Field
DocType
Computer architecture,Decoding,Power demand,Polynomials,Registers,Hardware,Circuits and systems
Architecture,Chien search,Computer science,Computer security,BCH code,Computer engineering
Journal
Volume
Issue
ISSN
63
3
1549-7747
Citations 
PageRank 
References 
2
0.45
6
Authors
3
Name
Order
Citations
PageRank
Hoyoung Yoo1759.99
Youngjoo Lee27418.85
In-Cheol Park3888124.36