Name
Title | ||
|---|---|---|
Ultrasmall: A Tiny Soft Processor Architecture With Multi-Bit Serial Datapaths For Fpgas |
Abstract | ||
|---|---|---|
Soft processors are widely used in FPGA-based embedded computing systems. For such purposes, efficiency in resource utilization is as important as high performance. This paper proposes Ultrasmall, a new soft processor architecture for FPGAs. Ultrasmall supports a subset of the MIPS-I instruction set architecture and employs an area efficient microarchitecture to reduce the use of FPGA resources. While supporting the original 32-bit ISA, Ultrasmall uses a 2-bit serial ALU for all of its operations. This approach significantly reduces the resource utilization instead of increasing the performance overheads. In addition to these device-independent optimizations, we applied several device-dependent optimizations for Xilinx Spartan-3E FPGAs using 4-input lookup tables (LUTs). Optimizations using specific primitives aggressively reduce the number of occupied slices. Our evaluation result shows that Ultrasmall occupies only 84% of the previous small soft processor. In addition to the utilized resource reduction, Ultrasmall achieves 2.9 times higher performance than the previous approach. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1587/transinf.2015PAP0022 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS |
Keywords | Field | DocType |
soft processor, processor architecture, FPGA | Computer vision,Computer graphics (images),Computer science,Field-programmable gate array,Artificial intelligence,Computer hardware,Microarchitecture | Journal |
Volume | Issue | ISSN |
E98D | 12 | 1745-1361 |
Citations | PageRank | References |
2 | 0.39 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shinya Takamaeda-Yamazaki | 1 | 65 | 16.83 |
| Hiroshi Nakatsuka | 2 | 6 | 0.96 |
| Yuichiro Tanaka | 3 | 37 | 5.11 |
| Kenji Kise | 4 | 149 | 26.53 |