Name
Title | ||
|---|---|---|
A Hybrid Reconfigurable Architecture and Design Methods Aiming at Control-Intensive Kernels |
Abstract | ||
|---|---|---|
With the development of parallel computing, the compute-intensive part of an application could be accelerated so dramatically that the control intensive part, usually processed by a sequential processor, is becoming more and more critical in terms of performance and power consumption. To address this problem, this paper proposes a novel reconfigurable architecture to execute control-intensive kern... |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TVLSI.2014.2349652 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Arrays,Kernel,Registers,Compounds,Hardware,Parallel processing | Electrical efficiency,Instruction-level parallelism,Kernel (linear algebra),Architecture,General purpose,Computer science,Parallel computing,Design methods,Real-time computing,Exploit,Speedup | Journal |
Volume | Issue | ISSN |
23 | 9 | 1063-8210 |
Citations | PageRank | References |
4 | 0.46 | 11 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jianfeng Zhu | 1 | 21 | 7.02 |
| leibo liu | 2 | 816 | 116.95 |
| shouyi yin | 3 | 579 | 99.95 |
| Xiao Yang | 4 | 4 | 0.46 |
| Shaojun Wei | 5 | 555 | 102.32 |