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JIANFENG ZHU
Author Info
Open Visualization
Name
Affiliation
Papers
JIANFENG ZHU
Tsinghua Univ, Natl Lab Informat Sci & Technol, Beijing 100084, Peoples R China
19
Collaborators
Citations
PageRank
52
21
7.02
Referers
Referees
References
81
261
89
Search Limit
100
261
Publications (19 rows)
Collaborators (52 rows)
Referers (81 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Jintide: Utilizing Low-Cost Reconfigurable External Monitors to Substantially Enhance Hardware Security of Large-Scale CPU Clusters
2
0.37
2021
A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications
5
0.48
2020
Human action recognition based on scene semantics
3
0.38
2019
A General Pattern-Based Dynamic Compilation Framework for Coarse-Grained Reconfigurable Architectures
1
0.39
2019
Jintide®: A Hardware Security Enhanced Server CPU with Xeon® Cores under Runtime Surveillance by an In-Package Dynamically Reconfigurable Processor
0
0.34
2019
Dual-Band Dual Circularly Polarized Antenna Array Using FSS-Integrated Polarization Rotation AMC Ground for Vehicle Satellite Communications
0
0.34
2019
Wideband Patch Antenna Using Multiple Parasitic Patches and Its Array Application With Mutual Coupling Reduction.
0
0.34
2018
Dynamic Timestamp Allocation for Reducing Transaction Aborts.
0
0.34
2018
A Progressive Web Application on Ancient Roman Empire Coins and Relevant Historical Figures with Graph Database.
0
0.34
2018
mm-Wave High Gain Cavity-Backed Aperture-Coupled Patch Antenna Array.
0
0.34
2018
GIS-Based Visibility Network and Defensibility Model to Reconstruct Defensive System of the Han Dynasty in Central Xinjiang, China.
0
0.34
2017
Leader or Majority: Why have one when you can have both? Improving Read Scalability in Raft-like consensus protocols.
0
0.34
2017
Phenological Observations on Classical Prehistoric Sites in the Middle and Lower Reaches of the Yellow River Based on Landsat NDVI Time Series.
3
0.50
2017
TLIA: Efficient Reconfigurable Architecture for Control-Intensive Kernels with Triggered-Long-Instructions.
1
0.36
2016
A Hybrid Reconfigurable Architecture and Design Methods Aiming at Control-Intensive Kernels
4
0.46
2015
Acceleration of control flows on reconfigurable architecture with a composite method
2
0.36
2015
A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only)
0
0.34
2015
Low-Power Reconfigurable Processor Utilizing Variable Dual V-Dd
0
0.34
2013
Low-Power Reconfigurable Processor Utilizing Variable Dual
0
0.34
2013
1