Name
Title | ||
|---|---|---|
Design and Analysis of Low-Power High-Frequency Robust Sub-Harmonic Injection-Locked Clock Multipliers |
Abstract | ||
|---|---|---|
A low-jitter, low-power LC-based injection-locked clock multiplier (ILCM) with a digital frequency-tracking loop (FTL) is presented. Based on a pulse gating technique, the proposed FTL continuously tunes the oscillator's free-running frequency to ensure robust operation across PVT variations. The FTL resolves the race condition existing in injection-locked PLLs by decoupling frequency tuning from ... |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/JSSC.2015.2478449 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Oscillators,Clocks,Phase locked loops,Jitter,Capacitors,Noise,Timing | Phase-locked loop,Capacitor,Control theory,Computer science,Phase noise,Injection locking,Harmonic,Electronic engineering,Frequency multiplier,Jitter,CPU multiplier | Journal |
Volume | Issue | ISSN |
50 | 12 | 0018-9200 |
Citations | PageRank | References |
11 | 0.63 | 17 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ahmed Elkholy | 1 | 77 | 16.19 |
| Mrunmay Talegaonkar | 2 | 123 | 15.61 |
| Tejasvi Anand | 3 | 110 | 16.98 |
| Pavan Kumar Hanumolu | 4 | 554 | 84.82 |