Name
Title | ||
|---|---|---|
A virtual instrument design for low-cost charge-pumping characterization of integrated MOSFETs |
Abstract | ||
|---|---|---|
Charge pumping techniques are used to characterize and quantify the interface state densities in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET). When carried in a semiconductor production line, this technique needs to be time efficient, calling for automated testing environments. Moreover, the cost of the characterization equipment used in the test is always a factor of relevance for budget conscious operation. In this paper we present the design of an automated Virtual Instrumentation Environment (VIE) for performing charge pumping characterization using low cost, off-the-shelf instrumentation. A discussion is presented of tradeoffs and design considerations for obtaining a functional design without compromising test flexibility and accuracy. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/LATW.2015.7102499 | LATS |
Field | DocType | Citations |
Logic gate,Virtual instrumentation,Functional design,Electronic engineering,Production line,Engineering,MOSFET,Transistor,Electrical engineering,Semiconductor,Instrumentation | Conference | 1 |
PageRank | References | Authors |
0.48 | 0 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jailene Hernandez | 1 | 1 | 0.48 |
| Johan Castrillon | 2 | 1 | 0.48 |
| Manuel Jiménez | 3 | 20 | 6.31 |
| Angel De La Torre | 4 | 1 | 0.48 |
| Pedro Escalona | 5 | 1 | 0.48 |
| Rogelio Palomera | 6 | 1 | 0.82 |