Name
Abstract | ||
|---|---|---|
Coarse-Grained Reconfigurable Architectures (CGRAs), often used as coprocessors for DSP and multimedia kernels, can deliver highly energy-efficient execution for compute-intensive kernels. Simultaneously, stream applications, which consist of many actors and channels connecting them, can provide natural representations for DSP applications, and therefore be a good match for CGRAs. We present our results of mapping DSP applications written in StreamIt language to CGRAs, along with our mapping flow. One important challenge in mapping is how to manage the multitude of kernels in the application for the limited local memory of a CGRA, for which we present a novel integer linear programming-based solution. Our evaluation results demonstrate that our software and hardware optimizations can help generate highly efficient mapping of stream applications to CGRAs, enabling far more energy-efficient executions (7× worse to 50× better) compared to using state-of-the-art GP-GPUs. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1145/2744769.2744884 | DAC |
Field | DocType | ISSN |
Digital signal processing,Embedded software,Load balancing (computing),Computer science,Parallel computing,Communication channel,Real-time computing,Software,Integer programming,Coprocessor,MPSoC | Conference | 0738-100X |
Citations | PageRank | References |
3 | 0.41 | 19 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hongsik Lee | 1 | 10 | 1.52 |
| Dong Nguyen | 2 | 682 | 49.92 |
| Jongeun Lee | 3 | 429 | 33.71 |