Title
A Method of Diagnostic Test Generation for Transition Faults
Abstract
This paper proposes a complete method of diagnostic test generation for transition faults. The method creates a diagnostic test generation model for a pair of transition faults to be distinguished from a given full-scan sequential circuit and employs an ordinary transition fault ATPG tool. The proposed model supports launch-off-capture and launch-off-shift modes which is supported by the ATPG tool. Diagnostic test patterns generated by the proposed method are of the same form as the scan test patterns of the given circuit, i.e., no pattern conversion is necessary. Experimental results show that a commercial transition fault ATPG tool can be utilized in our proposed method using benchmark circuits and, for a given undistinguished pair, the proposed method can generate a test pattern for distinguishing them or prove that they are indistinguishable.
Year
DOI
Venue
2015
10.1109/PRDC.2015.47
Pacific Rim International Symposium on Dependable Computing
Keywords
Field
DocType
Diagnostic test generation, test generation model, constrained transition fault ATPG, complete diagnostic resolution
Stuck-at fault,Automatic test pattern generation,Logic gate,Sequential logic,Fault coverage,Computer science,Diagnostic test,Real-time computing,Electronic circuit,Test compression
Conference
ISSN
Citations 
PageRank 
1555-094X
0
0.34
References 
Authors
11
2
Name
Order
Citations
PageRank
Renji Ono100.34
Satoshi Ohtake213521.62