Name
Abstract | ||
|---|---|---|
Hardware security is an important component of any chip design intended for use by critical infrastructure or any scenario where a malicious party may want to cause trouble. A possible avenue of attack is to insert tiny Hardware Trojan (HT) logic at the primary data inputs which the attacker can trigger undetected. A detection architecture and approach is proposed where initial data generation from analog to digital values is coupled with generation of a unique signature prior to passing the data (and associated signature) for later processing. A specific situation of providing the data to a cipher chip motivates and demonstrates the approach which regenerates the signature in the cipher chip and compares against the signature input with the data; a mismatch indicates that there is a problem. The practical impact of the approach in foiling attacks by tiny HT logic can be further strengthened by the select use of reconfigurable logic for off-chip signature generation and on-chip comparison/test as the attacker can only place a small amount of HT logic and remain \"tiny.\" |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1145/2818362.2818364 | WESS |
Field | DocType | Citations |
Cipher,Architecture,Hardware Trojan,Hardware security module,Computer science,Critical infrastructure,Chip,Integrated circuit design,Test data generation,Embedded system | Conference | 2 |
PageRank | References | Authors |
0.41 | 12 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Taimour Wehbe | 1 | 2 | 2.44 |
| Vincent Mooney | 2 | 2 | 0.41 |
| David C. Keezer | 3 | 68 | 17.00 |
| Nicholas B. Parham | 4 | 2 | 0.41 |