Title
A Framework for Efficient Implementation of Analog/RF Alternate Test with Model Redundancy
Abstract
A promising solution to reduce the testing costs of analog/RF circuits is the alternate test strategy, which permits to replace costly specification measurements by simple low-cost indirect measurements. Despite the substantial test cost reduction offered by this strategy, its deployment in industry is today limited mainly because of a lack of confidence in alternate test predictions. A potential solution to improve test confidence is to exploit model redundancy. The idea is to build different regression models for each specification during the training phase, and then to verify prediction consistency between the different models during the production testing phase. In case of divergent predictions, the devices are removed from the alternate test tier and directed to a second tier where further testing may be applied. In this paper, we present a framework for efficient implementation of alternate test with model redundancy. Results are illustrated on a power amplifier case study for which we have experimental test data over 11,200 devices.
Year
DOI
Venue
2015
10.1109/ISVLSI.2015.30
IEEE Computer Society Annual Symposium on VLSI
Keywords
Field
DocType
alternate testing,indirect testing,test efficiency,test confidence,model redundancy,low-cost measurements,specifications,analog/RF ICs
Software deployment,Test Management Approach,Exploit,Redundancy (engineering),Test data,Engineering,Electronic circuit,Test strategy,Reliability engineering,Cost reduction
Conference
ISSN
Citations 
PageRank 
2159-3469
0
0.34
References 
Authors
13
6
Name
Order
Citations
PageRank
Syhem Larguech150.88
Florence Azaïs2294.43
S. Bernard315624.78
Mariane Comte4617.44
Vincent Kerzérho5377.54
Michel Renovell674996.46