Title | ||
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Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures |
Abstract | ||
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Multilevel-cell (MLC) storage is a typical way for achieving higher capacity and thus lower cost per bit in memory technologies. In phase-change memory (PCM) MLC storage is seriously hampered by the phenomenon of resistance drift and the impact of temperature. Drift and temperature resilience is achieved through the use of a specific non-resistance-based cellstate metric. A statistical experimental characterization of PCM test devices in the presence of drift and at elevated temperatures is performed, and I-V characteristics are measured. The comparison of conventional resistance and a new enhanced (eM) metric demonstrates for the first time that reliable 2 bits/cell storage and subsequent data retention can be achieved in PCM cell arrays in the presence of temperature variation of the 50 °C magnitude. This development opens up the possibility for practical MLC storage in PCM chips. |
Year | DOI | Venue |
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2015 | 10.1109/IRPS.2015.7112747 | IRPS |
Keywords | Field | DocType |
Phase-change memory (PCM), multilevel-cell (MLC) storage, non-volatile memories (NVM), drift, endurance, readout metric | Phase-change memory,Data retention,Electronic engineering,Engineering,Resistance drift,Bit error rate | Conference |
ISSN | Citations | PageRank |
1541-7026 | 6 | 0.76 |
References | Authors | |
3 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Milos Stanisavljevic | 1 | 35 | 7.36 |
aravinthan athmanathan | 2 | 24 | 2.48 |
Nikolaos Papandreou | 3 | 251 | 28.18 |
Haralampos Pozidis | 4 | 193 | 27.36 |
Evangelos Eleftheriou | 5 | 1590 | 118.20 |